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IndustryArena Forum > OpenSource CNC Design Center > Open Source Controller Boards > Microcontroller based bipolar stepper driver
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  1. #21
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    Also note that whether or not Sync Rect is used, the fast decay current path involves making current go the opposite way on a shunt which puts the voltage to be sensed OUTSIDE the rails. Most hardware has a problem with this! Without specific hardware capabilities to deal with this, at best the signal will be unreadable while outside the rails, second worst it will mess with readings even after the sense voltage comes back within the rails (op amps need a period to recover from beyond-the-rails excursions for example), and at worst it can damage the chip.

    It seems that when you're doing fast-decay from a higher current level to a lower, but the direction of the coil current is the same, if you don't have the ability to measure current then the controller is a bit blind and could overshoot or undershoot because it doesn't know when to switch back.

    In fact, note that in recirculation mode (both lowsides on) the current sense resistor will read nothing since the coil current does not pass through ground at all. Yet the controller ideally needs to know what the current has decayed to. It shouldn't be allowed to decay too far. If we switch on the high side to check, there's a blanking interval which means the high side will be on for a certain fixed period, increasing current, before we can check it. This can raise the current beyond the target point and depending on the system this could happen repeatedly, raising the current each time.

    Actually if you put a low side current sense resistor on EACH half-bridge, you can still read current in recirculation mode. One sense voltage will be beyond-the-rails though, the other will have the same magnitude but opposite polarity making it more readable.

  2. #22
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    Quote Originally Posted by MechanoMan View Post
    Also note that whether or not Sync Rect is used, the fast decay current path involves making current go the opposite way on a shunt which puts the voltage to be sensed OUTSIDE the rails. Most hardware has a problem with this! Without specific hardware capabilities to deal with this, at best the signal will be unreadable while outside the rails, second worst it will mess with readings even after the sense voltage comes back within the rails (op amps need a period to recover from beyond-the-rails excursions for example), and at worst it can damage the chip.

    It seems that when you're doing fast-decay from a higher current level to a lower, but the direction of the coil current is the same, if you don't have the ability to measure current then the controller is a bit blind and could overshoot or undershoot because it doesn't know when to switch back.

    In fact, note that in recirculation mode (both lowsides on) the current sense resistor will read nothing since the coil current does not pass through ground at all. Yet the controller ideally needs to know what the current has decayed to. It shouldn't be allowed to decay too far. If we switch on the high side to check, there's a blanking interval which means the high side will be on for a certain fixed period, increasing current, before we can check it. This can raise the current beyond the target point and depending on the system this could happen repeatedly, raising the current each time.

    Actually if you put a low side current sense resistor on EACH half-bridge, you can still read current in recirculation mode. One sense voltage will be beyond-the-rails though, the other will have the same magnitude but opposite polarity making it more readable.
    Good point. Most people don't realize this.

    Kreutz.

  3. #23
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    Hi here,

    As I said to Dandumit in PM, it's an interesting project and I'm hoping it'll work!

    I've been reading this tread and lots of useful infos have been given.
    I'd like to thank Mariss for sharing his valuable knowledge. In addition to knowing a lot about steppers control, you know how to teach it in a pleasant way!

    Personally, I don't think I have anything to add, basically I went with CKL trough all evoked points in PAPSI's development, but not furtherer. I still miss a lot of experimentation, to clear all those "dark spots" that still remain in my knowledge of stepper control.

    One of those dark points is current sensing. I think it really is the most important point because current sense method will directly impact on the performance of the regulation, and also because some regulation algorithms cannot be used with all current sensing topologies.

    For example, the current sense resistor placed on the low side of th bridge sees the coils' current flow only when upper transistors are ON. So the voltage output at its end sees big transitions, with probably additional noise from MOSFET commutation, inductive ringing and slow settlement of following AOP (if required) etc.

    A rapid calculus with:
    -Power supply voltage = 20 times motor's nominal voltage
    -For a given microstep, one coil's current is say 1/10th or peak current
    Gives me a duty cycle of PWM output around 0.5% or so at zero speed. For a 20KHz PWM it means 250ns ON time if I'm right.
    Can this current sensing method be reliable in this case? I seriously doubt about it...

    On the paper, ACS712 chips (and equivalents) are the best part for current sensing from 0 to 100%DC for a µC based controller : isolated, measure can be taken all the time, and barely no heat dissipation. Also I figured that using those kinds of chips was also more economic than power resistors for 5amps range and wider. But in application...?
    I'll have to test and find out how it performs in real application!

    (But first, I really really need an O'scope )

  4. #24
    MechoMan,

    Sensing outside the rails (voltages above supply and below ground) isn't a big deal. Just look at a classic differentially connected op-amp circuit.:-)

    Mariss

  5. #25
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    Quote Originally Posted by MechanoMan View Post
    Also note that whether or not Sync Rect is used, the fast decay current path involves making current go the opposite way on a shunt which puts the voltage to be sensed OUTSIDE the rails.
    @MechanoMan - I have read your post 5-6 times trying to understand.
    I have looked again and again over a picture (attached) from L6208 Datasheet.
    All my logic explanation (to your knowledgeable details) is that the BEMF tension/current from coil it's bigger than Vsupply and this "forces" a negative tension over shunt referring to board ground. My novice plastic explanation is that in the first phase the coil is accepting energy and after that on Sync Rect coil is "generating" energy.

    All those are confusing me : could BEMF generate a tension bigger than Vsupply? Transistors from H bridge are still on conduction when current flows in opposite direction as it should be ?

    Anyway, Max-Mod idea to use one ACS712 chip it's very good. I think that this chip can be connected in serial with coil and overcome a lot from points mentioned by you earlier.

    One unpleasant think about ACS712-05 is that at 0A is generating 2.5 V and from -5A to 5A moves from 0 to 5 V.

    More than that , using this chip, H Bridges can be replaced by a single pair of
    transistors and a differential power supply for a potential extremely low cost driver.


    Regards,
    Daniel
    PS. I'm sorry because I'm bothering you since you are talking about fine details and I don't understand simple laws of physics.
    Attached Thumbnails Attached Thumbnails decay.jpg  

  6. #26
    Quote Originally Posted by MaX-MoD View Post
    Hi here,

    I've been reading this tread and lots of useful infos have been given.
    I'd like to thank Mariss for sharing his valuable knowledge. In addition to knowing a lot about steppers control, you know how to teach it in a pleasant way!

    (But first, I really really need an O'scope )
    Max-Mod,

    Thank you for the nice words. My belief is most technical things are simple once one takes the time to understand their underlying principles. Technical jargon in part is meant to intimidate the 'unwashed' and protect the 'experts'. Why else did doctors use Latin when simple vernacular would have served equally well?:-)

    I'll address your other points when I get to work.

    Mariss

  7. #27
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    Quote Originally Posted by dandumit View Post
    All my logic explanation (to your knowledgeable details) is that the BEMF tension/current from coil it's bigger than Vsupply and this "forces" a negative tension over shunt referring to board ground. My novice plastic explanation is that in the first phase the coil is accepting energy and after that on Sync Rect coil is "generating" energy.

    All those are confusing me : could BEMF generate a tension bigger than Vsupply? Transistors from H bridge are still on conduction when current flows in opposite direction as it should be ?
    Yes. Consider Fig 14, step b) and c).
    In step a), the supply is providing 1 amp across the inductor. In b), the inductor sustains its own current by the energy stored in its mag field. It does this by increasing the voltage (- on left, + on right in this case) until SOMETHING conducts. What happens in b) is that once the left motor terminal is more than 0.7v below ground and the right is more than 0.7v above Vdd is it forward-biases the MOSFET's reverse diodes, actually driving 1A INTO the Vdd supply (raising the supply's capacitor voltage slightly, hopefully not too much).

    Anyhow, look at the current path in b) and c). The current sense resistor will have a negative voltage on it. It's positive voltage in "normal" mode when current is flowing top-to-bottom. So it'll be negative when flowing bottom-to-top.

    As Mariss says, it is certainly possible to read this negative voltage. However, many diff op-amps themselves DON'T tolerate inputs beyond the rails either. A PIC controller will not read -1v and in fact that will forward-bias a protection diode on the input pin. If the impedance is low, it could burn out the diode and destroy the pin.

    The straightforward but overly complicated solution if you wanna be able to read this:
    1. Use a capacitive charge pump to make a -5v supply rail
    2. Use a differential op amp off a 5v to -5v supply to bias the signal to >0v.
    3. Put protection on the op amp outputs to prevent Vout from going negative
    4. Come up with a solution to determine the 0v bias point with good reliability

    Another solution:
    1. Make a -1v supply rail and a +4v rail.
    2. Place the controller between these two (5v).
    3. Tie the -1v supply to the STEP/PULSE input signal grounds, IF the -1v supply is floating. If not, optoisolate (which you might wanna do anyways)
    4. Go through a lot of worry about the 4v/-1v output to the gate driver

    Another solution:
    Technically the PIC's protection diodes won't forward-bias until the voltage goes below -0.3v. And the Analog Vref- also has an Absolute Max of -0.3v below ground. So... some might say it's possible to use a low-value resistor that would max out at -0.2v and use a -0.2v Vref-. There's kind of a debate on whether the spec sheet allows that or not. AB Max says 0.3v is the boundary before the device risks damage (in reality you'd kinda need more like 0.7v to bias that protection diode fully, so I'm not that worried if it were well controlled) BUT that might NOT guarantee that the analog section will function as intended within this range (such as providing meaningful ADC values).

  8. #28
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    Quote Originally Posted by amplexus View Post
    ... Has anyone messed around with the design outlined in the Cypress ap notes AN43679 AN2229 and AN41949
    pwm, sine cosine microstepping etc using a Cypress PSoC. It's no gecko but may be better tha some if the crap chips and the programming should be changable to implement mid band resonence compensation. Any comments
    PSoc vs coolrunner....
    Amplexus
    Amplexus has found a very interesting application note on Cypress WebSite.
    The board looks nice, and used Cypress Psoc it's pretty cheap.
    I didn't know until now about PSoc It seems to be a mix between Microtrl , FPGA and some analogic peripheral.
    I am tempted to give it a try !

  9. #29
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    It seems that are many more other application notes on stepper motor drivers
    http://www.cypress.com/?app=search&s...cationID=0&l=0

    http://www.psocdeveloper.com/docs/ap...-file/117.html

    the an2229 it's also quite interesting.

  10. #30
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    I have arranged the schematic and board to test this solution.
    Probably the pcb routing is offending many of you guys.
    Constructive criticism it is highly appreciated.
    Attached Thumbnails Attached Thumbnails psocdrv_sch_logic.gif   psocdrv_sch_h_bridge.gif   psocdrv_pcb.jpg  

  11. #31
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    May 2007
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    Hello Dan,

    have a few comments about your design:
    1.If you put slow AOP after the current sense resistors you will have very unaccurate current measurement. The fact is that when the bridge goes from low to high (off to on), the current crossing the shunts suddently goes from 0 to the coil's current (plus parasitic ringing caused by PCB traces and shunt's inductances, which can be 1-5 times bigger than the signal). On the AOP side the output will go from 0 to the correct (amplified) sensed value slowly. it means that the current that the PSoC will actually see is much inferior to the real current. This is really critical when the duty cycle is tiny (for example 1/50e duty cycle at 20KHz is 1%s long!), as the real current flowing throught the coil could be twice (or more!) than desired current.

    2.The PCB traces under the optocouplers are too close to the connectors (PC) side! Maybe in humid environnment the isolation provided would be as low as 50V (rather useless) so try to get rid of any pcb traces under the optos. Or if you can't, keep them as small as possible, and as close as possible to the PSoC's side.

    3.I guess the MOSFETs will be soldered under the PCB, mounted on a heatsink? Be sure there's no collision with underside components and the MOS driver's leads.

    Maybe the power side routing could be optimised, but except the low isolation spacing it seems good. But you could also varnish the PCB traces to get rid of any isolation problems

    PS:
    The optos are waaay to slow. I tried both EMC and MACH3 and they both make small (1µs) pulses so the opto's outputs cannot go up during a pulse... which means lost pulse. I use 6N136, no more problems.

    Keep on the good job!

    Cheers,
    Max

  12. #32
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    Aug 2006
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    at first glance it looks ok but mosfets seem to find new ways to self destruct and high current trace placement is more art than science, I'l look it over in more detail. the h bridge should present no real problems.


    The psoc is another matter the hardware needs some serious work.

    pwm needs to be changed from noisy chopper to synchronous pwm
    the PWM oscillator is reset on every step pulse. This
    ensures a 0Hz beat frequecy between the step pulse frequency and the
    PWM frequency at all times. Feedforward compensation adds a positive slope component to both the
    > attack and decay slopes enough to insure the attack slope is steeper
    > than the decay slope. This results in a stable waveform that repeats
    > every switching cycle period. elf. Form a summing node using two resistors. One
    resistor is driven by the slow-attack/fast-decay waveform. The other
    resistor is driven with a ramp waveform synchronous with the switching
    cycle.

    The summing node will display the sum of these waveforms; the slopes
    add (+,+) during attack, subtract (+,-) during decay. Scale the
    resistors to insure the summed attack slope is steeper than the
    differenced decay slope.

    midband compensation

    The midband resonance circuit adds a derivative component (+80 degrees
    phase lead) to the system phase angle to eliminate parametric
    resonance. It involves sensing the rate of motor load change
    (derivative of motor torque) which then phase modulates the internal
    step pulse timing.

    Phase can be measured by detection of the zero crossing of the current with
    a capture timer and correlating that to the voltage waveform. Another
    approach would be measuring the average absolute current. As the current
    through the two coils are triangular shaped and 90° phase shifted, adding
    their absolute values gives nearly a flat curve. Since voltage and
    inductance are constant you can calculate the ohmic resistance from it which
    represents copper loss and mechanical load. As mechanical load varies due to
    mid band oscillations the average current also does. The first method is
    best for a microprocessor the second would require lots of math but can be
    easily implemented in a little analog circuit.

    The second part is phase correction. There's only one way to do this because
    the drive is in constant voltage mode and you do not have any influence on
    the amplitude. So all you can do is to delay the step pulses to shift the
    phase. This can be easily done with an analog sawtooth ramp
    generator, at least as long as you microstep resolution is not too high
    The third part is to connect the sensing and correction to close the control
    loop. You have to insert a filter with the correct frequency and phase
    response between the two.

    A 555 pwm and a bandpass filter is one approach but perhaps not the best.



    also microstepping and morphing use dacs and a sine cosine lookup table morph to quad by 6 rpm
    A summing op amp may work for this as well decrease sine cosine microstep while simultaneously increasing full step signal.
    trim pot Low-speed resonances are nulled by a trimpot. It compensates for a V/L
    offset error all drives are prone to. The effect of voltage and inductance is simple. Voltage divided by
    inductance (V/L) sets the slew rate (Amps/sec) of the current through
    the winding. This slew rate is a fixed current slope that is positive
    when current increases and it is negative when current decreases.

    Its effect is the same if you are full-stepping (quadrature squarewave
    reference) or microstepping (sine-cosine reference). As speed
    increases, a full-step current waveform becomes markedly trapezoidal
    while the sine-cosine currents develop a ramp where the sine-cosine
    "slope" (1st derivative) exceeds the V/L slew rate.

    most of the above is from Mariss and others but should be a good starting point for a great drive. Gecko's will likely outperform it but for the dedicated diy guy it could be outstanding. as it stands now the psoc reference design is better than allegro but still with many flaws.
    Amplexus

  13. #33
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    ok . Thank you for directions !
    First I will build the prototype and I will start to modify it from chopping to sync pwm.
    Second I will investigate the decay scheme. in an2229 it says that it is perfoming fast and slow decay on same phase. Taking in account discussions from this forum it's too nice to be true...
    I will keep you posted.

  14. #34
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    let me know if I can help

    I'm no Bob Peace or Mariss but I can manage a few things let me know if I can help. At the very least I can keep you amused with unworkable ideas. If you get really stuck try e mailing Bob Peace, he is amazing and his columns are a goldmine of ideas.
    Amplexus

  15. #35
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    Aug 2006
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    psoc express

    I had some time yesterday (stuck in the hospital getting chemo) to mess with psoc express, it actually works and works well. drag and drop inputs and outputs and specify transfer functions and it automaticly configures the chip. You can run simulations build it to generate schematic automatically generate a data sheet and all of the c code, headers lib files main code everything. It is amazing, you can literally do a simple design in ten minutes.
    Amplexus

  16. #36
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    Feb 2005
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    Sorry for late reply (I was busy with some other problems).
    Indeed PSoc Designer it's a great tool (something at I was dreaming always - datasheets details very easy to access with sample code ! ) and by the way Cypress has released PSoC Creator in beta version.
    I have ordered an programmer from Farnell and I will keep you informed with this endeavor.

  17. #37
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    I have found an interesting schematic from IMS . It's a smart chip from description (or an avr rebranded?)
    Attached Thumbnails Attached Thumbnails ims2000.gif  

  18. #38
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    if you fiddle with their reference design you can make it synchronous and quiet, still needs morphing and midband resonance compensation
    Amplexus Bob

  19. #39
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    Regarding morphing, I think that could be implemented pretty easy with a microcontroller .
    However , I didn't managed to implement the stepper using psoc1 and they have published the version with psoc3 :
    http://www.cypress.com/?rID=39136
    Unfortunately they didn't made available the software...

  20. #40
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    Never it's too late - more than a year since my last post.

    I have managed to make work driver with Cypress.
    Are a lot of things to do next but very first steps are encouraging.

    Picasa Web Albums - Daniel Dumitru - PSoC Stepper 1
    Attached Thumbnails Attached Thumbnails IMG_20110115_122303.jpg   IMG_20110115_122322.jpg  

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