I don't see them listed in the G320 spec. I'm trying to fill in the blanks for the EMC2 step timing calculator spreadsheet.
I don't see them listed in the G320 spec. I'm trying to fill in the blanks for the EMC2 step timing calculator spreadsheet.
1uS setup and 1uS hold should be just fine. The STP input goes to a D-flop CLK while DIR goes to the D-flop D input. The 1uS time is more than plenty for optoisolator channel delay mismatch (typically +/-200nS).
Mariss
thanks for the quick reply