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  1. #61
    lucas,

    The dump circuit is unnecessary for recirculating mode standby. By definition the attack slope is steeper than the decay slope in this mode.

    By the way H500's 06-12-2011, 09:43 AM post scope pictures show pronounced notches at the full-step locations (sin 0, 90, 180, etc.). This is due to an overly long reset pulse applied to the time-base counter. The reset pulse synchronizes the PWM to the step pulse frequency at the full-step rate. The purpose is to prevent beat frequencies between the step rate and the PWM frequency. An overly long reset duration introduces such artifacts.

    Mariss

  2. #62
    Join Date
    Jan 2005
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    364
    Thanks very much for all the info wich you provided to allow us hobbiests build a decent drive.

    I have a machine running with CPLD drive's from your tutorial and PCB design using your recommendations on PCB layout, it's working fine.
    Will try to see what difference the change on the DUMP signal makes.


    Quote Originally Posted by Mariss Freimanis View Post
    4) Circle the projected beam on the wall with a pencil.
    Writing on the wall was forbidden by my ex-wife and I do forbid it to my grandchild also... :devious:

    Edit:
    Quote Originally Posted by Mariss Freimanis View Post
    By the way H500's 06-12-2011, 09:43 AM post scope pictures show pronounced notches at the full-step locations (sin 0, 90, 180, etc.). This is due to an overly long reset pulse applied to the time-base counter. The reset pulse synchronizes the PWM to the step pulse frequency at the full-step rate. The purpose is to prevent beat frequencies between the step rate and the PWM frequency. An overly long reset duration introduces such artifacts.
    I understand the synchronisation function between the step and PWM and I saw those notches also but seem to remember that there was a problem with the timebase counter, as far as I remember: The blanking period period doesn't start at the zero count. This didn't create problems with the original code but did when the code was modified for additional functions.
    Have to check my notes but I think these notches were gone when I modified it.
    Attached Thumbnails Attached Thumbnails S6000522.jpg  

  3. #63
    lucas,

    Is that your board? It's executed very neatly. I especially like how you compacted the high current section of the board layout. This shows thought about keeping high current traces short to minimize inductance.

    I don't see your current sense resistors in the picture but I assume you know the significance of forming a good Kelvin connection ground.

    For those that don't, the ground ends of the sense resistors have to be as close to each other as possible. That also is the only place you make your connection for all the low-level circuit ground returns. Think of your ground connections as being separated into two regions; noisy grounds (power section) and quiet grounds (low-level section). The meet at only one location, the ground ends of your current sense resistors.

    Mariss

    P.S. Like you, I'm also a grandpa. That means I'm old enough to reserve for myself rights I don't accord to my younger relatives; it's up to them to resolve the unfairness of the blatant hypocrisy.:-) Having said that, I do use a piece of paper on the wall but only because marks on the wall from repeated experiments confuse subsequent data-sets.

  4. #64
    Join Date
    Jan 2005
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    364
    Mariss,

    thanks for the compliment.
    I tried to respect the PCB design rules, this wasn't easy for a double sided board with all the different supply's and grounds.

    Quote Originally Posted by Mariss Freimanis View Post
    I don't see your current sense resistors in the picture but I assume you know the significance of forming a good Kelvin connection ground.
    They are SMD and are located on the solderside.
    This was done to have a "star-style" ground on the ground pins of the power supply decoupling elco and cap keeping everything short and tidy.
    There are also 2 seperate ground planes: power and signal.

    Luc.

  5. #65
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    Jan 2005
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    1695
    Marriss,

    Thanks for the tips. The lack of slope compensation was exactly what the problem was. If I remember correctly, Phil's code enabled the dump circuit only during standby.

    I did not have time to troubleshoot the artifacts, but your suggestion is appreciated and makes sense. I will look at it after I'm done with the dsp board. The board works very well even with the artifact.

  6. #66
    Join Date
    Jul 2005
    Posts
    4
    Okay, I'm not an EE, just a hobbyist :drowning: but tried to figure out what Mariss was describing in his part III post. I found this, which is helpful (sorta) for us non-engineer folks.

    This paper also mentions the use of applying harmonics to dampen resonance as he also mentioned in the part II post.

    http://158.132.178.85/norbert/Papers/C070.pdf

    Figure 8 is very interesting, showing a very linear corrected response, figure 3 gives an overview of how the system works.

  7. #67
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    A lot of interesting information has been presented in the last few posts! If I understand correctly, both Marriss and the paper achieved vibration damping by superimposing higher order harmonics of the stepping frequency. That should be easy to enough try.

  8. #68
    It's subject unto itself how to make an open loop step motor drive force a step motor to have good manners and behave itself. It means learning about every dark crook and cranny of a step motor's personality. There are many.

    Mariss

  9. #69
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    I just tried adding in the 3rd and 4th harmonics. It seems to reduce the vibration at the 10ipm resonance point, but it's hard to tell for sure. The vibration is quite low to begin with. I should probably use the laser pointer trick to optimize the linearity, but because the mill is working so well as it is, I'm not highly motivated. =)

  10. #70
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    to h500, are you have test video clip?

    thanks

  11. #71
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    I will post one on the weekend.

  12. #72
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    Here's a short clip of the driver in action on my sx3 mill. I don't know how to compress the video, so I'm keeping it short so my upload time is not too long.

    Both motors are 280 oz in, 4 amp per phase and directly drive 5 tpi double nut ball screws. Both axes are set at 250 ipm. I think it's pretty good, considering that the weight of the cross slide is about 100lbs.

    The cpld drive is on the y axis. The dsp drive is on the x. The latter has resonance damping, but it does not appear to make a difference on this setup. I am having a hard time deciding which drive I like better. I'll probably go with the dsp version since I find software easier than verilog when adding advanced features such as close loop control.

    The system is temporarily running from a 34v 2 amp supply. The drivers have been tested up to 60v, 6amps with my nema 34 steppers. That will put out more than 160w per motor. I think that will be an overkill even for the Z axis, which needs to lift a 100lb head vertically.


  13. #73
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    Mar 2005
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    hi h500, could you test drive in low speed , about 10rpm . ??

    thanks and regards

  14. #74
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    Here are more videos.

    Tivoidethuong, did you build the circuit?

    50 ipm, half circle move. Both drives are quite quiet except at the low speed resonance point (approx 12 ipm). The resonance is barely noticeable during operation. One day, I might tweak the harmonic injection to reduce the noise.

    The loud sound during the rapids is mostly from the ball screws.





    10 rpm. There is a slight hiss at certain microstep positions, but it's no where as loud as the Allegro chips I've used in the past.

  15. #75
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    Mar 2005
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    305
    to h500 i try build soon, with xc2c64a

    thanks your video

    b.r

  16. #76
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    hi H500, are you have any prolem at 28rpm to 32rpm
    b.r

  17. #77
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    There's no problem at any speed. It does vibrate more at around 50 rpm. But it never stalls.

    Are you having problems?

  18. #78
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    thanks h500, i trying layout

  19. #79
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    Dec 2011
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    17

    motor current setting

    Hi H500,
    I have some queries on your schematic, pls help me overcome this:
    1. Can you explain about Q5, Q6, Q7 R27 and R19? This is complex for me. Can I change these components by a varistor and connect to GND and 3.3V
    2. How to set “RUN” current limit and “Standby” current. it is good if you can show calculation.
    Thanks.

  20. #80
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    Jan 2005
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    Ghoang,

    I did not design the circuit, so my explanation could be wrong. q5,q7 and r19 is a constant current source. Q7 acts as a diode to cancel out the .7v transistor base emitter voltage in a temperature compensated fashion.

    The net effect is that .0005 is driven into r27 to put .5v per ohm into the resistor network which further divide it down by about 10 before reaching the comparator.

    Since .05 ohm is used to sense the current, you get about 1 amp per volt. Do not use R19 to set the current. If you turn the pot too far, 12v will be shorted into 3v3 and damage the cpld.

    Replacing everything with a potentiometer will sort of work, but you will lose the advantage of low impedance and temperature compensation.

    There is no way to set the standby current reduction. It's a very desirable feature, so I would recommend you add it to the design.

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