I'm working on interfacing a Paper Tape Reader, specifically a Fanuc A13B-0070-B001, to a computer - at hardware level a Xilinx Zynq via a CPLD.
This is a retro computing project with the objective of reading 1" paper tape. Initially using the Zynq's FPGA fabric and Arm Cortex A-9, with the potential to interface to an (FPGA) PDP-11 (or 8) implemented in the Zynq.
There appears to be little documentation of the tape reader interface generally and specifically of Fanuc PCBs; a schematic for the tape reader electronics (Fanuc A20B-0007-0750-07B) would provide 90% of what I seek.
The interface is of course that employed by a Fanuc BTR. However, it is applied to the much less common tape reader use case. And, I can't find a BTR Fanuc Tape Reader interface specification.
Initial reverse engineering has identified the likely basics of the 50 way parallel interface (using Fanuc's pin out nomenclature):
B 1 .. 24 Gnd
B25 n/c (pin out as key)
A 1 .. 8 Reader channels 1 .. 8, i.e. bits 0 .. 7 [5v TTL]
A 9 Sprocket channel [5v TTL]
A 10 / 12 / 20 to 5V pu thro 220R : function ?
A 11 / 13 driven outputs [5v TTL], function tbd
A 21 / 22 5V supply
A 23 / 24 24V supply
A others n/c ?
Specific questions:
- 24V is the correct Fanuc Tape Reader supply voltage for electromagnet actuation etc ?
- BTR / tape reader interface specification
- Fanuc documentation for Tape Readers, below the CNC system maintenance manual level (e.g. B-52245E/04 https://www.vintagecomputer.net/fanu...anuals1788.pdf)
- Generic functions of pins A 10 11 12 13 20
- What is the specification of the (unused ?) 6 pin x 0.2" pitch Burndy DC supply connector and are mating halves available; from the machining dust I doubt it was used in the readers previous life
All / any information, advice, wisdom will be gratefully received
OldFellow